Volume 4 Issue 2
Research Article | IJVSP-V4I2P101
High-Speed and Energy-Efficient Carry Skip Adder functioning under a extensive range of supply voltage Levels
Amrutavarshini S H and Mr. S Pramod Kumar
Research Article | IJVSP-V4I2P102
Fewer cost and superior functioning architecture of VSLI premeditated with Multiplication of Montgomery
Meghana T.M and Pradeep Kumar S K
Research Article | IJVSP-V4I2P103
Power Optimization Techniques for High Speed Processor Core in Sub 14nm Technology Node
Kolusu Siva Mounica and Prashant K. Shah
Research Article | IJVSP-V4I2P104
A 4-bit High Speed, Low Power Flash ADC by Employing Binary Search Algorithm
Brahmaiah Throvagunta and Prashant K Shah
Research Article | IJVSP-V4I2P105
Face Recognition for Access Control using PCA Algorithm
Opeyemi Oyelesi and Akingbade Kayode Francis
Research Article | IJVSP-V4I2P106
Noise optimization using FIR Filter
Sandeep Kumar G and Nilam Chheda
Research Article | IJVSP-V4I2P107
Semi-Custom design of functional unit block using data path methodology in data cache unit
Aarti Patel and Prashant K.Shah
Research Article | IJVSP-V4I2P108
Density Evolution of Low Density Parity Check codes over different channels
P.Ravikiran and Mehul C. Patel