SSRG - IJVSP - Volume 4 Issue 1 - January - April 2017
Research Article | IJVSP-V4I1P101
Distortion Monitored Rate Allocation for Video
Fairooz SK and Dr.Madhavi B.K
Research Article | IJVSP-V4I1P102
Design of 2 GHz Integrator using Feedforward-Regulated Cascode Operational Transconductance Amplifier
Akhtara Afsana Ahmed, Ziree Ziree Daimary, Nirmal Rai, Rochan Banstola, Suman Das, Surya Prakash Tamang
Research Article | IJVSP-V4I1P103
Design of Second Order Adiabatic Logic for Energy Dissipation in VLSI CMOS Circuits
Sudhakar Alluri, B.Rajendra Naik and N.S.S.Reddy
Research Article | IJVSP-V4I1P104
Realisation of Vedic sutras for multiplication in Verilog
A. Kamaraj, A. Daisy Parimalah and V. Priyadharshini